The present invention is related to transistor devices. More particularly, the present invention provides a method and device for fabricating three-dimensional transistors with hybrid crystal orientations. Merely by way of example, the methods can be applied to CMOS, bipolar, diodes, etc.
Conventional transistors are fabricated on a surface of a silicon substrate, i.e. planar devices. A complementary metal-oxide-semiconductor (CMOS) device is a type of such planar devices that are typically fabricated side by side on a (100) silicon substrate. It is well known that electron mobility is highest for a (100) silicon surface with a <110> channel direction, while hole mobility is highest for a (110) silicon surface with a <110> channel direction.
Thus, it is desirable to fabricate a transistor device in a three dimensional manner with hybrid crystal orientation to improve density and performance of IC devices.